DeepX claims 100 billion‑parameter inference under 5 W
chips inference startup
| Source: HN | Original article
South Korean startup DeepX tapes out its second‑generation AI accelerator, claiming it can run inference on models up to 100B parameters while consuming less than 5 W.
South Korean edge‑AI startup DeepX has taped out its second‑generation accelerator, the DX‑M2, and says the chip can run inference on models as large as 100 billion parameters while drawing less than 5 watts of power. The claim rests on a custom processor‑in‑memory (PIM) architecture supplied by Samsung, which DeepX says lets generative AI workloads run on power‑constrained platforms such as robots, drones and other edge devices.
The announcement follows the mass‑production launch of DeepX’s first‑generation DX‑M1, a vision‑focused processor that has already entered the market. By pushing the parameter ceiling to the 100‑billion range, DeepX aims to close the gap between cloud‑grade large language models and on‑device inference, a step that could unlock new use cases where latency, privacy or connectivity are critical.
If the performance and efficiency figures hold up in silicon, the DX‑M2 would represent a significant shift in the economics of edge AI. Current edge chips typically handle models measured in the low‑hundreds of millions of parameters; a sub‑5‑W solution for 100‑billion‑parameter models would dramatically expand the scope of on‑device generative AI, from real‑time language understanding to sophisticated visual reasoning in autonomous systems.
The next milestones to watch are silicon validation and volume‑production timelines, as well as early adoption by OEMs in robotics and unmanned aerial vehicles. Industry observers will also be looking for how DeepX’s PIM approach stacks up against competing low‑power AI accelerators and whether the claimed efficiency can be replicated in real‑world deployments.
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