OpenAI Launches Jalapeno ASIC Chips with AMD EPYC in Turin
chips inference nvidia openai
| Source: Mastodon | Original article
OpenAI has deployed its custom Jalapeno ASIC chips alongside AMD EPYC Turin CPUs, opting for AMD's mature platform over Nvidia's Vera processor.
OpenAI has begun rolling out its custom‑designed Jalapeño inference ASIC inside its own data‑centres, pairing each chip with AMD’s EPYC “Turin” CPUs rather than the newly announced Nvidia Vera processor. According to a report from Tom’s Hardware, the rack‑scale configuration houses two Turin‑class processors and 1.5 TB of DRAM per host, with the Jalapeño ASIC mounted alongside the AMD silicon. OpenAI’s hardware lead, Richard Ho, explained that Turin’s maturity and the company’s existing expertise with the platform outweighed the appeal of Nvidia’s untested Vera CPU for the first production design.
The decision signals a pragmatic shift in OpenAI’s hardware strategy. By opting for a proven AMD ecosystem, the firm reduces the risk of supply‑chain delays and integration bugs that could stall model training or inference workloads. It also underscores a willingness to diversify away from Nvidia, a partner that has supplied the bulk of OpenAI’s GPU fleet to date. For the broader AI industry, the move highlights the growing importance of custom ASICs and the need for flexible host architectures that can accommodate them.
Observers will be watching how Nvidia reacts—industry analysts expect the chip‑maker to push back, possibly accelerating Vera’s roadmap or offering incentives to retain OpenAI’s business. Further signals to monitor include whether OpenAI expands the Jalapeño‑Turin deployment beyond internal labs, how the configuration impacts latency and cost for its services, and whether other AI firms follow suit by pairing bespoke accelerators with non‑Nvidia CPUs. The hardware choice could shape the competitive dynamics of AI compute for years to come.
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