TechCrunch Disrupt 2026: Ricursive Intelligence’s Anna Goldie and Azalia Mirhoseini on AI’s move to design its own hardware
chips
| Source: TechCrunch | Original article
At TechCrunch Disrupt 2026, Ricursive Intelligence co‑founders will discuss how AI can begin designing its own hardware, aiming to close the loop between AI and chip development.
TechCrunch Disrupt 2026 will feature Ricursive Intelligence co‑founders Anna Goldie and Azalia Mirhoseini on the Disrupt Stage, where they will explore “closing the loop” between artificial intelligence and chip development. The session promises to examine how AI systems can move beyond software‑only roles to actively participate in the design of the hardware that runs them.
The move matters because hardware has traditionally lagged behind software in terms of rapid iteration. If AI can generate, evaluate, and optimise silicon architectures, the industry could see dramatically shorter design cycles, lower development costs and chips that are tightly matched to emerging model requirements. Such co‑design could also reshape competitive dynamics, giving start‑ups with strong AI‑driven design tools a foothold against established foundries.
The announcement arrives amid growing interest in AI‑generated hardware, a theme that has been hinted at in recent coverage of AI‑centric research but has not yet materialised into public demonstrations. Ricursive Intelligence’s focus on a feedback loop—where AI informs chip layout and the resulting silicon, in turn, accelerates AI capabilities—signals a concrete step toward that vision.
What to watch next includes any prototype chips or design frameworks Ricursive Intelligence unveils in the weeks following the conference, potential partnerships with semiconductor manufacturers, and reactions from major players such as Nvidia, Intel and emerging AI‑chip start‑ups. Observers will also be keen to see whether the discussion translates into measurable progress on AI‑driven hardware pipelines, a development that could accelerate the deployment of next‑generation models across cloud, edge and embedded environments.
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